Open collector output which may discharge a capacitor between intervals.

The timing (OUT high) interval ends when the voltage at THR ('threshold') is greater than that at CTRL (2/3 VCC if CTRL is open).

Provides 'control' access to the internal voltage divider (by default, 2/3 VCC).A timing interval may be reset by driving this input to GND, but the timing does not begin again until RESET rises above approximately 0.7 volts.This output is driven to approximately 1.7 V below +VCC, or to GND.Output of the timer totally depends upon the amplitude of the external trigger voltage applied to this pin. More simply we can say that OUT will be high as long as the trigger is kept at low voltage. The OUT pin goes high and a timing interval starts when this input falls below 1/2 of CTRL voltage (which is typically 1/3 VCC, CTRL being 2/3 VCC by default if CTRL is left open).Ground reference voltage, low level (0 V) Pin 2- (TRIG).You can see the ne555 pinout diagram below.Pin 1- (GND) Finally, pin 7 has an external capacitor that works with the resistor to control the timing intervals.

Pin 5 is the control voltage pin connected to the environment through the use of a small capacitor-the capacitor levels out any fluctuations that might affect how the timer operates.

Pin 1 is the ground pin that connects the chip to the ground.

NE555 has eight different pins, and each has other functions. The following are the key application areas for the ne555 chip:

Operating temperature o to 70 degrees Celsius.

Power consumption(minimum operating) 15V.

According to its datasheet, some of the main specs of the ne555 chip are:

555 timer pinout download